Which of the following statements is correct regarding the relationship between instruction execution, memory hierarchy, and addr…

Question

Which of the following statements is correct regarding the relationship between instruction execution, memory hierarchy, and addressing modes in a typical von Neumann architecture computer system?

1. A. Immediate addressing always speeds up execution by avoiding memory access.
2. B. A larger cache always improves performance, regardless of hit ratio.
3. C. Data hazards can occur in pipelined CPUs even with only register addressing. (Correct answer)
4. D. Virtual memory removes the need for cache memory.

Correct Answer

Option C — C

Detailed Solution & Explanation

The correct answer is Option C.

Key Points

• data hazards can occur in pipelined CPUs even with only register addressing.
• A data hazard happens when one instruction depends on the result of a previous instruction that has not yet finished moving through the pipeline.
• This is a property of pipelining and instruction dependencies, not of how operands are addressed — so it can occur even when every operand is in a register.

Additional Information

• (A) Immediate addressing usually avoids a memory fetch, but 'always speeds up execution' is too absolute.
• (B) A larger cache only helps if the hit ratio is good; more cache with a poor hit ratio does not guarantee gains.
• (D) Virtual memory and cache serve different purposes — virtual memory extends address space using disk; cache speeds up access to RAM. One does not remove the need for the other.

Exam Tip

• the three classic pipeline hazards are data, control (branch), and structural hazards.